Altifigence adds Google XLS support to Digital Design Studio
Connect hardware design intent expressed in DSLX to an RTL implementation.
Altifigence has added Google XLS support to Digital Design Studio. Users can now describe hardware functionality in DSLX and use XLS to convert it into synthesizable RTL. This update adds a way to start designs in high-level code and evaluate implementation candidates within Digital Design Studio.
What is Google XLS?
Google XLS is an open-source synthesis tool for implementing high-level computations as digital circuits. It converts designs written in DSLX into an intermediate representation, or IR, then generates Verilog or SystemVerilog through optimization and scheduling. It connects code that describes functionality with an actual hardware implementation. Official Google XLS documentation
DSLX is a language that lets designers specify the data types and bit widths needed for hardware. Designers can define inputs, outputs, computation rules, and data representations in code to make the required behavior explicit. They can then inspect the implementation results and refine the design. Official DSLX documentation
From functional description to pipeline structure
In hardware design, the same function can lead to different implementations depending on how computations and pipelines are organized. XLS scheduling assigns operations to pipeline stages while accounting for dependencies between operations and timing constraints. Conditions such as a target clock period or a specified number of pipeline stages can help designers examine the relationship between latency and register usage. XLS scheduling documentation
This workflow is useful for comparing design alternatives. Designers can first express the required functionality, then change the computation structure or constraints and inspect the results to find an implementation that meets their requirements. The generated RTL is subsequently evaluated under actual conditions during synthesis, verification, and physical implementation.
An example: designing a computation block
Consider a computation block that multiplies several inputs by weights and then adds the results. A designer can specify the inputs' bit widths and signedness, the output range, and the handling of overflow, then express these choices in DSLX. Preparing test inputs and expected outputs also helps check the functionality in concrete terms.
XLS then generates RTL through conversion, optimization, and scheduling. If requirements change, the designer can revise the high-level description or implementation constraints and evaluate other candidates. This example illustrates a design approach using XLS; actual performance and area depend on the design and subsequent implementation conditions.
From code written with AI to a hardware implementation
AI can help turn design requirements into code, review data types and boundary conditions, and prepare test inputs. XLS connects the high-level designs written and refined through this process to RTL. Designers can develop their implementations while checking the intended functionality and generated results.
Altifigence also supports ChatGPT's GPT-6 Astra model. Google XLS support is the focus of this update, bringing code authoring and review with AI into a high-level hardware design workflow.
Get started in Digital Design Studio
Google XLS support expands the design approaches available in Digital Design Studio. Alongside writing RTL, users can choose to express the required functionality in DSLX and develop it into a hardware implementation.
Start designing hardware with Google XLS in Digital Design Studio.